Please use this identifier to cite or link to this item:
|Title:||High speed video processing using fine-grained processing on FPGA platform|
Fine-grained FPGA computing
High speed video processing
|Citation:||Ang, Z.P., Kumar, A., Ha, Y. (2013). High speed video processing using fine-grained processing on FPGA platform. Proceedings - 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2013 : 85-88. ScholarBank@NUS Repository. https://doi.org/10.1109/FCCM.2013.32|
|Abstract:||This summary paper1 proposes an FPGA-based array processor which performs Laplacian filtering on a 40 by 40 pixel grayscale video. The architecture comprises of bitserial pixel processors interconnected to give a two-dimensional mesh array. This architecture features the novel use of partial reconfiguration which transfers data to and fro the array. Each processor occupies a configurable logic block and achieves a target frame rate of 10000 frames per second, at an operating frequency of 0.31 MHz on the Virtex-6 ML605 Evaluation Kit. The detailed correspondence between the contents of slice lookup tables and the Virtex-6 bitstream format is also documented. © 2013 IEEE.|
|Source Title:||Proceedings - 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2013|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Sep 20, 2018
WEB OF SCIENCETM
checked on Sep 4, 2018
checked on Sep 22, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.