Please use this identifier to cite or link to this item: https://doi.org/10.1109/FPL.2012.6339377
Title: Development of an FPGA-based real-time P300 speller
Authors: Khurana, K.
Gupta, P.
Panicker, R.C. 
Kumar, A. 
Keywords: brain computer interface (BCI)
Field-programmable gate array (FPGA)
P300
Real-time system
Issue Date: 2012
Source: Khurana, K.,Gupta, P.,Panicker, R.C.,Kumar, A. (2012). Development of an FPGA-based real-time P300 speller. Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012 : 551-554. ScholarBank@NUS Repository. https://doi.org/10.1109/FPL.2012.6339377
Abstract: A Brain Computer Interface (BCI) is a system that allows direct communication between a computer and the human brain. Though the main application for BCIs is in rehabilitation of disabled patients, they are increasingly being used in other application scenarios as well. Most of the current BCI systems are based on personal computers. However, there is an increased interest in implementing BCIs for portable platforms as well, such as mobile phones and Field Programmable Gate Arrays (FPGAs) owing to low cost, power and portability. This paper proposes a low-cost FPGA based BCI speller application. The proposed system combines a stimulation panel, data acquisition and FPGA based real-time signal processing. The BCI system demonstrated here is a speller, which allows the user to use his/her brain signals to communicate directly with the application and spell out words by merely looking at the screen. The system achieves an accuracy of 65.37% when utilizing 2 rounds of data per character and an accuracy of 100% when utilizing 20 rounds of data per character. © 2012 IEEE.
Source Title: Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012
URI: http://scholarbank.nus.edu.sg/handle/10635/69914
ISBN: 9781467322560
DOI: 10.1109/FPL.2012.6339377
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