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|Title:||Communication-aware application mapping and scheduling for NoC-based MPSoCs|
|Source:||Yu, H.,Ha, Y.,Veeravalli, B. (2010). Communication-aware application mapping and scheduling for NoC-based MPSoCs. ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems : 3232-3235. ScholarBank@NUS Repository. https://doi.org/10.1109/ISCAS.2010.5537920|
|Abstract:||Combined computation and communication workload mapping and scheduling pose a major challenge in embedded NoC-based MPSoC design. While contemporary researches largely focus on data locality-centric mapping methodologies, unawareness of transmission route and timing may negatively impact the mapping efficiency. In this paper, we develop a unified communication-aware NoC-based MPSoC mapping and scheduling algorithm, in which a list-scheduling method is used to map prioritized tasks to the best fit processor, based on a transmission route-aware cost function. Our algorithm is able to realize precise and predictable packet routing in the process of task mapping, and achieve shorter end-to-end application execution time. To evaluate our algorithm, we conduct experiments using three real applications on a simulated NoC-based MPSoC platform. Comparison results show that our algorithm can achieve greatly improved overall end-to-end time, and about 38.3% less transmission time on a 3 x 3 mesh structure. ©2010 IEEE.|
|Source Title:||ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems|
|Appears in Collections:||Staff Publications|
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