Please use this identifier to cite or link to this item: https://doi.org/10.1109/PESC.2008.4592533
Title: An enabling device technology for future superjunction power integrated circuits
Authors: Chen, Y.
Liang, Y.C. 
Samudra, G.S. 
Buddharaju, K.D.
Feng, H.
Keywords: Automotive power electronics
Partial SOI
Power integrated circuits
Power LDMOS
Superjunction
Issue Date: 2008
Source: Chen, Y., Liang, Y.C., Samudra, G.S., Buddharaju, K.D., Feng, H. (2008). An enabling device technology for future superjunction power integrated circuits. PESC Record - IEEE Annual Power Electronics Specialists Conference : 3713-3716. ScholarBank@NUS Repository. https://doi.org/10.1109/PESC.2008.4592533
Abstract: The lateral superjunction power MOSFET device fabricated on the bulk silicon substrate suffers from the substrate-assisted depletion effect, which causes charge imbalance and thus limits the sustainable voltage rating. An enabling device technology, which is fully integrated on the partial Silicon on Insulator (PSOI) platform using the bulk silicon substrate, is described in this paper. The new technology has the potential to eliminate the substrate-assisted depletion. It enables the implementation of lateral superjunction power MOSFET (SJ LDMOS) on bulk silicon substrate without sacrificing its electrical and thermal performance. The approach was demonstrated successfully on both planar and trench gate SJ LDMOS devices. At the given breakdown voltage rating, the drift region doping concentration can be raised to one order higher than that of the conventional LDMOS. The proposed technology has enabled the fabrication of SJ power integrated circuits on the bulk silicon substrate for future automotive power electronics applications. ©2008 IEEE.
Source Title: PESC Record - IEEE Annual Power Electronics Specialists Conference
URI: http://scholarbank.nus.edu.sg/handle/10635/69313
ISBN: 9781424416684
ISSN: 02759306
DOI: 10.1109/PESC.2008.4592533
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