Please use this identifier to cite or link to this item: https://doi.org/10.1109/IECON.2005.1568896
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dc.titleA thermoelectricity-lamp based integrated bake/chill system for photoresist processing
dc.contributor.authorTay, A.
dc.contributor.authorChua, H.-T.
dc.contributor.authorHo, W.-S.
dc.contributor.authorZhou, Y.
dc.date.accessioned2014-06-19T02:56:53Z
dc.date.available2014-06-19T02:56:53Z
dc.date.issued2005
dc.identifier.citationTay, A.,Chua, H.-T.,Ho, W.-S.,Zhou, Y. (2005). A thermoelectricity-lamp based integrated bake/chill system for photoresist processing. IECON Proceedings (Industrial Electronics Conference) 2005 : 153-158. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/IECON.2005.1568896" target="_blank">https://doi.org/10.1109/IECON.2005.1568896</a>
dc.identifier.isbn0780392523
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/69105
dc.description.abstractThe design of an integrated bake/chill module for photoresist processing in microlithography is presented, with emphasis on the spatial and temporal temperature uniformity of the substrate. The system consists of multiple radiant heating zones for heating the substrate, coupled with an array of thermoelectric devices (TEDs) which provide real-time dynamic and spatial control of the substrate temperature. The TEDs also provide active cooling for chilling the substrate to a temperature suitable for subsequent processing steps. The use of lamp for radiative heating also provide fast ramp-up and ramp-down rates during thermal cycling operations. The feasibility of the proposed approach is demonstrate via simulations based on first principle heat transfer modeling. The distributed nature of the design also means that a simple decentralized control scheme can be used to achieve tight spatial and temporal temperature uniformity specifications. © 2005 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/IECON.2005.1568896
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/IECON.2005.1568896
dc.description.sourcetitleIECON Proceedings (Industrial Electronics Conference)
dc.description.volume2005
dc.description.page153-158
dc.description.codenIEPRE
dc.identifier.isiutNOT_IN_WOS
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