Please use this identifier to cite or link to this item: https://doi.org/10.1109/PESC.2006.1712035
Title: A space vector PWM scheme to reduce common mode voltage for a cascaded multilevel inverter
Authors: Gupta, A.K.
Khambadkone, A.M. 
Issue Date: 2006
Source: Gupta, A.K.,Khambadkone, A.M. (2006). A space vector PWM scheme to reduce common mode voltage for a cascaded multilevel inverter. PESC Record - IEEE Annual Power Electronics Specialists Conference : -. ScholarBank@NUS Repository. https://doi.org/10.1109/PESC.2006.1712035
Abstract: Multilevel inverters generate common mode voltage similar to two-level inverters. Schemes have been reported for multilevel inverters to reduce the common mode voltage. However, most of the schemes result in reduced modulation depth, high switching losses and high harmonic distortion. This paper proposes a simple space vector PWM scheme to reduce common mode voltage for cascaded multilevel inverter and addresses these issues. The scheme is explained for S-level inverter. The scheme can be easily extended to a n-level inverter. Both experimental and simulation results are provided.
Source Title: PESC Record - IEEE Annual Power Electronics Specialists Conference
URI: http://scholarbank.nus.edu.sg/handle/10635/69081
ISBN: 0780397169
ISSN: 02759306
DOI: 10.1109/PESC.2006.1712035
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