Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSIC.2007.4342692
Title: A CMOS readout circuit for silicon resonant accelerometer with 32-ppb bias stability
Authors: He, L.
Xu, Y.P. 
Palaniapan, M. 
Keywords: Bias stability
CMOS readout circuit
MEMS resonator
Issue Date: 2007
Source: He, L., Xu, Y.P., Palaniapan, M. (2007). A CMOS readout circuit for silicon resonant accelerometer with 32-ppb bias stability. IEEE Symposium on VLSI Circuits, Digest of Technical Papers : 146-147. ScholarBank@NUS Repository. https://doi.org/10.1109/VLSIC.2007.4342692
Abstract: This paper describes a fully-differential CMOS readout circuit for silicon micro-resonant accelerometer. Tested with a SOI resonator, the readout chip sustains the oscillation at 110 kHz with a phase noise of -36dBc@1Hz and a bias stability of 0.0035Hz or 32ppb, which can be translated to an amplitude noise of 1Å/√Hz down to 0.05Hz and stability of 0.22Å up to 100 seconds. The chip is fabricated in a 0.35-um CMOS process and draws 5mA under a 3.3-V single supply.
Source Title: IEEE Symposium on VLSI Circuits, Digest of Technical Papers
URI: http://scholarbank.nus.edu.sg/handle/10635/68732
ISBN: 9784900784048
DOI: 10.1109/VLSIC.2007.4342692
Appears in Collections:Staff Publications

Show full item record
Files in This Item:
There are no files associated with this item.

Page view(s)

36
checked on Apr 20, 2018

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.