Please use this identifier to cite or link to this item: https://doi.org/10.1109/ASSCC.2008.4708827
Title: 2ghz cmos noise cancellation vco
Authors: Bansal, A.
Heng, C.H. 
Issue Date: 2008
Citation: Bansal, A.,Heng, C.H. (2008). 2ghz cmos noise cancellation vco. Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 : 461-464. ScholarBank@NUS Repository. https://doi.org/10.1109/ASSCC.2008.4708827
Abstract: A 2GHz CMOS VCO, employing noise cancellation to eliminate flicker noise up-conversion, has been fabricated in 0.35um CMOS. An overall phase noise reduction of 10dB has been measured with the proposed technique, and phase noise of -121.6dBc/Hz@500kHz offset has been achieved. The VCO core consumes 2.8mA under 2.4V supply and occupies an area of 0.7mmx0.8mm. The proposed VCO measured FOM of -186 dBc/Hz.©2008 IEEE.
Source Title: Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008
URI: http://scholarbank.nus.edu.sg/handle/10635/68672
ISBN: 9781424426058
DOI: 10.1109/ASSCC.2008.4708827
Appears in Collections:Staff Publications

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