Please use this identifier to cite or link to this item: https://doi.org/10.1109/82.318940
DC FieldValue
dc.titleFrequency-response masking approach for digital filter design: complexity reduction via masking filter factorization
dc.contributor.authorLim, Y.C.
dc.contributor.authorLian, Yong
dc.date.accessioned2014-06-17T06:48:42Z
dc.date.available2014-06-17T06:48:42Z
dc.date.issued1994-08
dc.identifier.citationLim, Y.C., Lian, Yong (1994-08). Frequency-response masking approach for digital filter design: complexity reduction via masking filter factorization. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 41 (8) : 518-525. ScholarBank@NUS Repository. https://doi.org/10.1109/82.318940
dc.identifier.issn10577130
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/62220
dc.description.abstractIt has been reported in several recent publications that the frequency response masking technique is eminently suitable for synthesizing filters with very narrow transition-width. The major advantages of the frequency response masking approach are that the resulting filter has a very sparse coefficient vector and that the resulting filter length is only slightly longer than that of the theoretical (Remez) minimum. The system of filters produced by the frequency response masking technique consists of a sparse coefficient filter with periodic frequency response and one or more pairs of masking filters. Each pair of the masking filters consist of two filters whose frequency responses are similar except at frequencies near the band-edges. In this paper, we present three methods for reducing the complexity of the masking filters. The success of our technique is due to the fact that each pair of the masking filters can be realized as a cascade of a common subfilter and a pair of equalizers.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/82.318940
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL ENGINEERING
dc.description.doi10.1109/82.318940
dc.description.sourcetitleIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
dc.description.volume41
dc.description.issue8
dc.description.page518-525
dc.description.codenICSPE
dc.identifier.isiutA1994PH82400003
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