Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2003.819268
DC FieldValue
dc.titleTunable Oxide-Bypassed Trench Gate MOSFET: Breaking the Ideal Superjunction MOSFET Performance Line at Equal Column Width
dc.contributor.authorYang, X.
dc.contributor.authorLiang, Y.C.
dc.contributor.authorSamudra, G.S.
dc.contributor.authorLiu, Y.
dc.date.accessioned2014-06-17T03:09:23Z
dc.date.available2014-06-17T03:09:23Z
dc.date.issued2003-11
dc.identifier.citationYang, X., Liang, Y.C., Samudra, G.S., Liu, Y. (2003-11). Tunable Oxide-Bypassed Trench Gate MOSFET: Breaking the Ideal Superjunction MOSFET Performance Line at Equal Column Width. IEEE Electron Device Letters 24 (11) : 704-706. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2003.819268
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/57717
dc.description.abstractThe superjunction (SJ) MOSFET power device is highly recognized for its higher blocking capability and lower on-state resistance that breaks the conventional unipolar silicon limit However, SJ devices below 100 V rating incur constraint of unrealistic narrower column widths [1], [2] and their performance is greatly handicapped due to difficulties in formation of perfect charge-balanced SJ p-n columns by current process technology. Based on the alternative approach of tunable oxide-bypassed (TOB) SJ MOSFET concept proposed in [15], a TOB-UMOS device of 79 V rating has been successfully fabricated for the first time. Laboratory measurements indicate that the device has broken the ideal SJ MOSFET performance line at equal column width of 3.5 μm, and potentially the ideal silicon limit as well.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2003.819268
dc.sourceScopus
dc.subjectBreakdown voltage
dc.subjectIdeal silicon limit
dc.subjectIdeal superjunction limit
dc.subjectPower superjunction MOSFET
dc.subjectSpecific on-resistance
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2003.819268
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume24
dc.description.issue11
dc.description.page704-706
dc.description.codenEDLED
dc.identifier.isiut000186402800010
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