Please use this identifier to cite or link to this item: https://doi.org/10.1109/TED.2002.807459
Title: The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors
Authors: Ren, C.
Cai, J.
Liang, Y.C. 
Ong, P.H.
Balasubramanian, N.
Sin, J.K.O.
Keywords: CMOS process
LDMOSFET
Microinductor
Partial SOI
RFIC
SOI
Issue Date: Dec-2002
Source: Ren, C., Cai, J., Liang, Y.C., Ong, P.H., Balasubramanian, N., Sin, J.K.O. (2002-12). The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors. IEEE Transactions on Electron Devices 49 (12) : 2271-2278. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2002.807459
Abstract: A new partial silicon-on-insulator (SOI) formation technology and the associated RF LDMOSFET device structure on silicon bulk substrate are proposed in this paper. The same technology can also be applied to enhance the quality factor of the integrated on-chip microinductors. The proposed technology is able to reduce both drain/substrate parasitics and leakage current for devices fabricated on bulk substrate. At the same time, the approach overcomes the thermal problem encountered by devices fabricated on full-SOI substrate. To demonstrate the technology, both partial-SOI LDMOSFET and microinductor devices were fabricated on bulk wafer with their RF performance verified by laboratory measurements.
Source Title: IEEE Transactions on Electron Devices
URI: http://scholarbank.nus.edu.sg/handle/10635/57630
ISSN: 00189383
DOI: 10.1109/TED.2002.807459
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