Please use this identifier to cite or link to this item: https://doi.org/10.1109/TSM.2006.890314
Title: Temperature control and in situ fault detection of wafer warpage
Authors: Ho, W.K. 
Yap, C. 
Tay, A. 
Chen, W.
Zhou, Y.
Tan, W.W. 
Chen, M.
Keywords: Fault detection
Lithography
Temperature measurement
Wafer warpage
Issue Date: Feb-2007
Source: Ho, W.K., Yap, C., Tay, A., Chen, W., Zhou, Y., Tan, W.W., Chen, M. (2007-02). Temperature control and in situ fault detection of wafer warpage. IEEE Transactions on Semiconductor Manufacturing 20 (1) : 1-4. ScholarBank@NUS Repository. https://doi.org/10.1109/TSM.2006.890314
Abstract: Warped wafers can affect device performance, reliability, and linewidth control in various processing steps. We propose in this paper an in situ fault detection technique for wafer warpage in lithography. The use of advanced process control results in very small temperature disturbance making it suitable for industrial implementation. © 2007 IEEE.
Source Title: IEEE Transactions on Semiconductor Manufacturing
URI: http://scholarbank.nus.edu.sg/handle/10635/57602
ISSN: 08946507
DOI: 10.1109/TSM.2006.890314
Appears in Collections:Staff Publications

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