Please use this identifier to cite or link to this item:
|Title:||Scheduling divisible loads on heterogeneous linear daisy chain networks with arbitrary processor release times|
|Authors:||Veeravalli, B. |
|Source:||Veeravalli, B., Min, W.H. (2004-03). Scheduling divisible loads on heterogeneous linear daisy chain networks with arbitrary processor release times. IEEE Transactions on Parallel and Distributed Systems 15 (3) : 273-288. ScholarBank@NUS Repository. https://doi.org/10.1109/TPDS.2004.1264811|
|Abstract:||The problem of distributing and processing a divisible load in a heterogeneous linear network of processors with arbitrary processors release times is considered. A divisible load is very large in size and has computationally intensive CPU requirements. Further, it has the property that the load can be partitioned arbitrarily into any number of portions and can be scheduled onto processors independently for computation. The load is assumed to arrive at one of the farthest end processors, referred to as boundary processors, for processing. The processors in the network are assumed to have nonzero release times, i.e., the time instants from which the processors are available for processing the divisible load. Our objective is to design a load distribution strategy by taking-into account the release times of the processors in such a way that the entire processing time of the load is a minimum. We consider two generic cases in which all processors have identical release times and when all processors have arbitrary release times. We adopt both the single and multi-installment strategies proposed in the divisible load scheduling literature in our design of load distribution strategies, wherever necessary, to achieve a minimum processing time. Finally, when optimal strategies cannot be realized, we propose two heuristic strategies, one for the identical case, and the other for nonidentical release times case, respectively. Several conditions are derived to determine whether or not optimal load distribution exists and illustrative examples are provided for the ease of understanding.|
|Source Title:||IEEE Transactions on Parallel and Distributed Systems|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Feb 13, 2018
WEB OF SCIENCETM
checked on Feb 13, 2018
checked on Feb 20, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.