Please use this identifier to cite or link to this item: https://doi.org/10.1049/el:20010564
Title: Real-time three-dimensional modular SAR preprocessor design
Authors: Chan, H.L.
Yeo, T.S. 
Issue Date: 21-Jun-2001
Source: Chan, H.L., Yeo, T.S. (2001-06-21). Real-time three-dimensional modular SAR preprocessor design. Electronics Letters 37 (13) : 853-855. ScholarBank@NUS Repository. https://doi.org/10.1049/el:20010564
Abstract: The architecture design for a high-speed front-end video pre-filtering is described, this being part of an effort to develop a real-time range-doppler digital SAR processor to produce image maps of the scanned area immediately as raw data are collected. The evolved architecture consists of three-dimensionally interconnected planes of modified transverse FIR parallel tapped elements. Both the range and azimuth prefilterings are performed simultaneously in a continuous input-output flow without the need to consider corner turning. The computation load has been reduced to one complex multiplication and two complex additions.
Source Title: Electronics Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/57206
ISSN: 00135194
DOI: 10.1049/el:20010564
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