Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2008.2011503
Title: Polycrystalline Si nanowire SONOS nonvolatile memory cell fabricated on a gate-all-around (GAA) channel architecture
Authors: Fu, J.
Jiang, Y.
Singh, N.
Zhu, C.X. 
Lo, G.Q.
Kwong, D.L.
Keywords: Gate-all-around (GAA)
Nanowire
Nonvolatile memory
Polycrystalline silicon (poly-Si)
SONOS
Issue Date: 2009
Citation: Fu, J., Jiang, Y., Singh, N., Zhu, C.X., Lo, G.Q., Kwong, D.L. (2009). Polycrystalline Si nanowire SONOS nonvolatile memory cell fabricated on a gate-all-around (GAA) channel architecture. IEEE Electron Device Letters 30 (3) : 246-249. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2008.2011503
Abstract: In this letter, we present SONOS nonvolatile memory device with gate-all-around polycrystalline silicon (poly-Si) nanowire channel. The SONOS memory cell with 23-nm nanowire width, fabricated using top-down CMOS process, exhibits fast programming and erasing speed as well as improved subthreshold behavior of the transistor. Both the memory and transistor characteristics are dependent on the nanowire width-smaller the width, better the performance. The good device characteristics along with simple fabrication method make the poly-Si nanowire SONOS memory a promising candidate for future system-on-panel and system-on-chip applications. © 2009 IEEE.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/57087
ISSN: 07413106
DOI: 10.1109/LED.2008.2011503
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