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|Title:||Diagram representations of charge pumping processes in CMOS transistors|
|Keywords:||Bias temperature instability|
|Citation:||Xinyun, H., Guangfan, J., Chen, S., Wei, C., Daming, H., Mingfu, L. (2010-08). Diagram representations of charge pumping processes in CMOS transistors. Journal of Semiconductors 31 (8) : -. ScholarBank@NUS Repository. https://doi.org/10.1088/1674-4926/31/8/084003|
|Abstract:||A diagram representation method is proposed to interpret the complicated charge pumping (CP) processes. The fast and slow traps in CP measurement are defined. Some phenomena such as CP pulse rise/fall time dependence, frequency dependence, the voltage dependence for the fast and slow traps, and the geometric CP component are clearly illustrated at a glance by the diagram representation. For the slow trap CP measurement, there is a transition stage and a steady stage due to the asymmetry of the electron and hole capture, and the CP current is determined by the lower capturing electron or hole component. The method is used to discuss the legitimacy of the newly developed modified charge pumping method. © 2010 Chinese Institute of Electronics.|
|Source Title:||Journal of Semiconductors|
|Appears in Collections:||Staff Publications|
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