Please use this identifier to cite or link to this item:
|Title:||A dielectrophoretic chip with a 3-D electric field gradient|
Three-dimensional (3-D) electric field gradient
|Source:||Iliescu, C., Yu, L., Xu, G., Tay, F.E.H. (2006-12). A dielectrophoretic chip with a 3-D electric field gradient. Journal of Microelectromechanical Systems 15 (6) : 1506-1513. ScholarBank@NUS Repository. https://doi.org/10.1109/JMEMS.2006.883567|
|Abstract:||This paper presents the design, fabrication and testing of a new structure of dielectrophoresis (DEP) chip having a three-dimensional (3-D) electric field gradient and an asymmetric distribution of the electric field in the vertical plane. This achievement was possible due to the special configuration of the electrodes: a bulk silicon electrode and a thin amorphous silicon electrode. The thick electrode defines, at the same time, the walls, while the two glass dies form the ceiling and floor of the microfluidic channel. The top glass die presents two etch-through inlet/outlet holes of the microfluidic channel. In the bottom glass die, isotropic via-holes are performed through the glass for the lead-outs. For this reason, the lead-outs does not generate fluidic leakage. Using a single material for the electrodes, the electrochemical effect for conventional multilayer metal electrodes is eliminated. The proposed DEP structure, with thin and thick electrodes, generates in the vertical plane an asymmetric distribution of the electric field and, therefore, an enhanced electric field gradient. As a result, for positive DEP, the particles are trapped near the thin electrode, while for negative DEP the particles are levitated. Compared with typical planar DEP devices, the proposed DEP structure, presents an increased DEP force in the vertical direction. As a result, the same trapping or levitation effect can be achieved at a lower voltage and, in this way, with a reduced heating of the solution. Using the bulk electrode for definition of the microfluidic channel, the need for a separate channel wall material is eliminated. The DEP device is wafer level packaged (being fully fabricated at wafer level using batch processes) therefore, can be consider as a low cost solution. The good isolating properties of the glass confer the opportunity of working at a high frequency range. Yeast cells have been used to successfully test the performance of the device: the trapping using positive DEP occurred on the bottom of the channel near the thin electrode, while the negative DEP generate a suspension of the cells 35-40 μm from the bottom. © 2006 IEEE.|
|Source Title:||Journal of Microelectromechanical Systems|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Dec 13, 2017
WEB OF SCIENCETM
checked on Nov 16, 2017
checked on Dec 10, 2017
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.