Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/51956
Title: Architectures and EDA for 3D FPGAs
Authors: HOU JUNSONG
Keywords: FPGA, 3D IC, EDA, Placement, Thermal, TSV
Issue Date: 3-Jan-2014
Source: HOU JUNSONG (2014-01-03). Architectures and EDA for 3D FPGAs. ScholarBank@NUS Repository.
Abstract: Research on 3D IC design is actively conducted for its high logic density and excellent performance, compared with conventional 2D Integrated Circuit (IC) design. In this study, we explore the architecture and the EDA on 3D Field Programmable Gate Array (FPGA) which is implemented by stacking the conventional 2D FPGAs. Thermal and Through Silicon Via (TSV) reduction are two of the major design challenges we focus on in this thesis.
URI: http://scholarbank.nus.edu.sg/handle/10635/51956
Appears in Collections:Master's Theses (Open)

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