Please use this identifier to cite or link to this item: https://doi.org/10.1109/43.822628
Title: Global optimization for digital MOS circuits performance
Authors: Chen, H.M.
Samudra, G.S. 
Chan, D.S.H. 
Ibrahim, Y. 
Issue Date: 2000
Source: Chen, H.M., Samudra, G.S., Chan, D.S.H., Ibrahim, Y. (2000). Global optimization for digital MOS circuits performance. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19 (1) : 161-164. ScholarBank@NUS Repository. https://doi.org/10.1109/43.822628
Abstract: Apart from maximization of parametric yield, minimization of the spread in performance functions due to process variation is of extreme importance in very large scale integrated circuit design. To achieve efficient minimization of the spread, a novel algorithm based on the genetic algorithm and global approximation methods is proposed. The algorithm operates in two stages designated as coarse and fine optimization stages and adjusts design parameter set to simultaneously achieve the target performance and reduction in performance spread. The algorithm has distinctive features, such as global optimum design, subexponential complexity algorithm for N-P complete problem of global optimization, and simultaneous optimization of many functions. The algorithm is demonstrated using four design examples.
Source Title: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
URI: http://scholarbank.nus.edu.sg/handle/10635/50565
ISSN: 02780070
DOI: 10.1109/43.822628
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