Please use this identifier to cite or link to this item:
|Title:||Generating hardware from OpenMP programs|
|Source:||Leow, Y.Y., Ng, C.Y., Wong, W.F. (2006). Generating hardware from OpenMP programs. Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006 : 73-80. ScholarBank@NUS Repository. https://doi.org/10.1109/FPT.2006.270297|
|Abstract:||Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, we describe our effort to generate hardware from OpenMP, a software parallel programming paradigm that is widely used and tested. We are able to generate FPGA hardware from OpenMP C programs via synthesizable VHDL and Handel-C. We believe that the addition of this medium-grain parallel programming paradigm will bring additional value to the repertoire of hardware description languages. © 2006 IEEE.|
|Source Title:||Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Feb 22, 2018
WEB OF SCIENCETM
checked on Jan 24, 2018
checked on Feb 19, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.