Please use this identifier to cite or link to this item: https://doi.org/10.1109/FPT.2006.270297
Title: Generating hardware from OpenMP programs
Authors: Leow, Y.Y.
Ng, C.Y.
Wong, W.F. 
Issue Date: 2006
Source: Leow, Y.Y., Ng, C.Y., Wong, W.F. (2006). Generating hardware from OpenMP programs. Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006 : 73-80. ScholarBank@NUS Repository. https://doi.org/10.1109/FPT.2006.270297
Abstract: Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, we describe our effort to generate hardware from OpenMP, a software parallel programming paradigm that is widely used and tested. We are able to generate FPGA hardware from OpenMP C programs via synthesizable VHDL and Handel-C. We believe that the addition of this medium-grain parallel programming paradigm will bring additional value to the repertoire of hardware description languages. © 2006 IEEE.
Source Title: Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006
URI: http://scholarbank.nus.edu.sg/handle/10635/42147
ISBN: 0780397282
DOI: 10.1109/FPT.2006.270297
Appears in Collections:Staff Publications

Show full item record
Files in This Item:
There are no files associated with this item.

SCOPUSTM   
Citations

22
checked on Dec 6, 2017

WEB OF SCIENCETM
Citations

3
checked on Nov 20, 2017

Page view(s)

50
checked on Dec 10, 2017

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.