Please use this identifier to cite or link to this item: https://doi.org/10.1145/1289881.1289906
Title: An efficient framework for dynamic reconfiguration of instruction-set customization
Authors: Huynh, H.P.
Sim, J.E. 
Mitra, T. 
Keywords: Customizable processors
Dynamic reconfiguration
Instruction-set extensions
Temporal partitioning
Issue Date: 2007
Source: Huynh, H.P.,Sim, J.E.,Mitra, T. (2007). An efficient framework for dynamic reconfiguration of instruction-set customization. CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems : 135-144. ScholarBank@NUS Repository. https://doi.org/10.1145/1289881.1289906
Abstract: We present an efficient framework for dynamic reconfiguration of application-specific instruction-set customization. A key component of this framework is an iterative algorithm for temporal and spatial partitioning of the loop kernels. Our algorithm maximizes performance gain of an application while taking into consideration the dynamic reconfiguration cost. It selects the appropriate custom instruction-sets for the loops and maps them into appropriate configurations. We model the temporal partitioning problem as a k-way graph partitioning problem. A dynamic programming based solution is used for the spatial partitioning. Comprehensive experimental results indicate that our iterative algorithm is highly scalable while producing optimal or near-optimal (99% of the optimal) performance gain. Copyright 2007 ACM.
Source Title: CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
URI: http://scholarbank.nus.edu.sg/handle/10635/41786
ISBN: 9781595938268
DOI: 10.1145/1289881.1289906
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