Please use this identifier to cite or link to this item:
|Title:||Exploring locking & partitioning for predictable shared caches on multi-cores|
|Authors:||Suhendra, V. |
|Source:||Suhendra, V.,Mitra, T. (2008). Exploring locking & partitioning for predictable shared caches on multi-cores. Proceedings - Design Automation Conference : 300-303. ScholarBank@NUS Repository. https://doi.org/10.1109/DAC.2008.4555827|
|Abstract:||Multi-core architectures consisting of multiple processing cores on a chip have become increasingly prevalent. Synthesizing hard realtime applications onto these platforms is quite challenging, as the contention among the cores for various shared resources leads to inherent timing unpredictability. This paper proposes the use of shared cache in a predictable manner through a combination of locking and partitioning mechanisms. We explore possible design choices and evaluate their effects on the worst-case application performance. Our study reveals certain design principles that strongly dictate the performance of a predictable memory hierarchy. Copyright 2008 ACM.|
|Source Title:||Proceedings - Design Automation Conference|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Dec 11, 2017
checked on Dec 16, 2017
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.