Please use this identifier to cite or link to this item: https://doi.org/10.1109/APSEC.2012.60
Title: Using monterey phoenix to formalize and verify system architectures
Authors: Zhang, J.
Liu, Y.
Auguston, M.
Sun, J.
Dong, J.S. 
Issue Date: 2012
Source: Zhang, J., Liu, Y., Auguston, M., Sun, J., Dong, J.S. (2012). Using monterey phoenix to formalize and verify system architectures. Proceedings - Asia-Pacific Software Engineering Conference, APSEC 1 : 644-653. ScholarBank@NUS Repository. https://doi.org/10.1109/APSEC.2012.60
Abstract: Modeling and analyzing software architectures are useful for helping to understand the system structures and facilitate proper implementation of user requirements. Despite its importance in the software engineering practice, the lack of formal description and verification support hinders the development of quality architectural models. In this work, we develop an approach for modeling and verifying software architectures specified using Monterey Phoenix (MP) architecture description language. Firstly, we formalize the syntax and operational semantics for MP. This language is capable of modeling system and environment behaviors based on event traces, as well as supporting different architecture composition operations and views. Secondly, a dedicated model checker for MP is developed based on PAT verification framework. Finally, several case studies are presented to evaluate the usability and effectiveness of our approach. © 2012 IEEE.
Source Title: Proceedings - Asia-Pacific Software Engineering Conference, APSEC
URI: http://scholarbank.nus.edu.sg/handle/10635/40063
ISBN: 9780769549224
ISSN: 15301362
DOI: 10.1109/APSEC.2012.60
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