Please use this identifier to cite or link to this item: https://doi.org/10.1145/1734206.1734210
DC FieldValue
dc.titleScratchpad allocation for concurrent embedded software
dc.contributor.authorSuhendra, V.
dc.contributor.authorRoychoudhury, A.
dc.contributor.authorMitra, T.
dc.date.accessioned2013-07-04T07:48:22Z
dc.date.available2013-07-04T07:48:22Z
dc.date.issued2010
dc.identifier.citationSuhendra, V., Roychoudhury, A., Mitra, T. (2010). Scratchpad allocation for concurrent embedded software. ACM Transactions on Programming Languages and Systems 32 (4). ScholarBank@NUS Repository. https://doi.org/10.1145/1734206.1734210
dc.identifier.issn01640925
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/39735
dc.description.abstractSoftware-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation algorithms typically consider single-process applications. But embedded applications are mostly multitasking with real-time constraints, where the scratchpad memory space has to be shared among interacting processes that may preempt each other. In this work, we develop a novel dynamic scratchpad allocation technique that takes these process interferences into account to improve the performance and predictability of the memory system. We model the application as a Message Sequence Chart (MSC) to best capture the interprocess interactions. Our goal is to optimize the Worst-Case Response Time (WCRT) of the application through runtime reloading of the scratchpad memory content at appropriate execution points. We propose an iterative allocation algorithm that consists of two critical steps: (1) analyze the MSC along with the existing allocation to determine potential interference patterns, and (2) exploit this interference information to tune the scratchpad reloading points and content so as to best improve the WCRT. We present various alternative scratchpad allocation heuristics and evaluate their effectiveness in reducing the WCRT. The scheme is also extended to work on Message Sequence Graph models. We evaluate our memory allocation scheme on two real-world embedded applications controlling an Unmanned Aerial Vehicle (UAV) and an in-orbit monitoring instrument, respectively. © 2010 ACM.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1145/1734206.1734210
dc.sourceScopus
dc.subjectCompiler controlled memories
dc.subjectMessage sequence chart
dc.subjectMulticore architectures
dc.subjectScratchpad memory
dc.subjectUML sequence diagram
dc.subjectWorst-case response time
dc.typeArticle
dc.contributor.departmentCOMPUTER SCIENCE
dc.description.doi10.1145/1734206.1734210
dc.description.sourcetitleACM Transactions on Programming Languages and Systems
dc.description.volume32
dc.description.issue4
dc.description.codenATPSD
dc.identifier.isiut000277057700004
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