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|Title:||Exploiting an abstract-machine-based framework in the design of a Java ILP processor|
|Citation:||Wang, H.C., Yuen, C.K. (2009). Exploiting an abstract-machine-based framework in the design of a Java ILP processor. Journal of Systems Architecture 55 (1) : 53-60. ScholarBank@NUS Repository. https://doi.org/10.1016/j.sysarc.2008.07.006|
|Abstract:||Abstract machines bridge the gap between the high-level of programming languages and the low-level mechanisms of a real machine. The paper proposed a general abstract-machine-based framework (AMBF) to build instruction level parallelism processors using the instruction tagging technique. The constructed processor may accept code written in any (abstract or real) machine instruction set, and produce tagged machine code after data conflicts are resolved. This requires the construction of a tagging unit which emulates the sequential execution of the program using tags rather than actual values. The paper presents a Java ILP processor by using the proposed framework. The Java processor takes advantage of the tagging unit to dynamically translate Java bytecode instructions to RISC-like tag-based instructions to facilitate the use of a general-purpose RISC core and enable the exploitation of instruction level parallelism. We detailed the Java ILP processor architecture and the design issues. Benchmarking of the Java processor using SpecJVM98 and Linpack has shown the overall ILP speedup improvement between 78% and 173%. © 2008 Elsevier B.V. All rights reserved.|
|Source Title:||Journal of Systems Architecture|
|Appears in Collections:||Staff Publications|
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