Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/34916
Title: Method and apparatus for a digital clock multiplication circuit
Authors: LYE, KIN MUN 
JOE, JURIANTO 
Issue Date: 9-Jan-2003
Citation: LYE, KIN MUN,JOE, JURIANTO (2003-01-09). Method and apparatus for a digital clock multiplication circuit. ScholarBank@NUS Repository.
Abstract: A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable region. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.
URI: http://scholarbank.nus.edu.sg/handle/10635/34916
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