Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/32639
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dc.titleIncorporation of dielectric layer onto SThM tips for direct thermal analysis
dc.contributor.authorHU, CHANG CHAUN
dc.contributor.authorPEY, KIN LEONG
dc.contributor.authorCHONG, YUNG FU
dc.contributor.authorKIN, CHIM WAI
dc.contributor.authorNEUZIL, PAVEL
dc.contributor.authorCHAN, LAP
dc.date.accessioned2012-05-02T02:28:10Z
dc.date.available2012-05-02T02:28:10Z
dc.date.issued2003-05-20
dc.identifier.citationHU, CHANG CHAUN,PEY, KIN LEONG,CHONG, YUNG FU,KIN, CHIM WAI,NEUZIL, PAVEL,CHAN, LAP (2003-05-20). Incorporation of dielectric layer onto SThM tips for direct thermal analysis. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/32639
dc.description.abstractOne of the limitations to current usage of scanning thermal microscopes arises when one needs to obtain a thermal map of an electrically biased specimen. Current practice is for the conductive parts of the specimen to be passivated to prevent excessive current leakage between the tip and the conductive sample. The present invention eliminates the need for this by coating the probe's microtip with a layer of insulation that is also a good thermal conductor. Examples of both thermocouple and thermistor based probes are given along with processes for their manufacture.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/http://analytics.patsnap.com/patent_view/view?pn=US6566650
dc.sourcePatSnap
dc.typePatent
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.identifier.isiutNOT_IN_WOS
dc.description.patentnoUS6566650
dc.description.patenttypeGranted Patent
dc.contributor.patentassigneeCHARTERED SEMICONDUCTOR MANUFACTURING LTD. (SINGAPORE, SG)
dc.contributor.patentassigneeNATIONAL UNIVERSITY OF SINGAPORE (SINGAPORE, SG)
dc.contributor.patentassigneeINSTITUTE OF MICROELECTRONICS
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