Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/32637
Title: Process for device using partial SOI
Authors: JUN, CAI 
HONG, REN CHANG
NAGARAJAN, RANGANATHAN
BALASUBRAMANIAN, NARAYANAN 
LIANG, YUNG CHII 
Issue Date: 22-Apr-2003
Source: JUN, CAI,HONG, REN CHANG,NAGARAJAN, RANGANATHAN,BALASUBRAMANIAN, NARAYANAN,LIANG, YUNG CHII (2003-04-22). Process for device using partial SOI. ScholarBank@NUS Repository.
Abstract: A process for manufacturing a buried oxide layer for use in partial SOI structures is described. The process begins with the etching of deep trenches into a silicon body. For a preselected depth below the surface, the inner walls of the trenches are protected and oxidation of said walls is then effected until pinch-off occurs, both inside the trenches and in the material between trenches. The result is a continuous layer of wade whose size and shape are determined by the number and location of the trenches. Application of the process to the manufacture of a partial SOI RFLDMOS structure is also described together with performance data for the resulting device.
URI: http://scholarbank.nus.edu.sg/handle/10635/32637
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