Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/32579
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dc.titlePassivation of copper interconnect surfaces with a passivating metal layer
dc.contributor.authorCHAN, LAP
dc.contributor.authorYAP, KUAN PEI
dc.contributor.authorTEE, KHENG CHOK
dc.contributor.authorIP, FLORA S.
dc.contributor.authorLOH, WYE BOON
dc.date.accessioned2012-05-02T02:27:19Z
dc.date.available2012-05-02T02:27:19Z
dc.date.issued2000-08-08
dc.identifier.citationCHAN, LAP,YAP, KUAN PEI,TEE, KHENG CHOK,IP, FLORA S.,LOH, WYE BOON (2000-08-08). Passivation of copper interconnect surfaces with a passivating metal layer. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/32579
dc.description.abstractAn interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line. Perform a CMP step to planarize the device and to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole. Alternatively, a blanket deposit of a copper metal line layer covers the diffusion layer and fills the interconnect hole with a copper metal line. Perform a CMP process to planarize the device to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole in a self-aligned deposition process.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/http://analytics.patsnap.com/patent_view/view?pn=US6100195
dc.sourcePatSnap
dc.typePatent
dc.contributor.departmentINSTITUTE OF MICROELECTRONICS
dc.identifier.isiutNOT_IN_WOS
dc.description.patentnoUS6100195
dc.description.patenttypeGranted Patent
dc.contributor.patentassigneeCHARTERED SEMICONDUCTOR MANU. LTD. (SINGAPORE, SG)
dc.contributor.patentassigneeNATIONAL UNIVERSITY OF SINGAPORE (SINGAPORE, SG)
dc.contributor.patentassigneeNAHYANG TECHN. UNIV. OF SINGAPORE (SINGAPORE, SG)
dc.contributor.patentassigneeINSTITUTE OF MICROELECTRONICS
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