Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/22096
Title: Fabrication and Characterization of Tunneling Field Effect Transistors (TFETs)
Authors: YANG LITAO
Keywords: TFET
Issue Date: 29-Jun-2010
Source: YANG LITAO (2010-06-29). Fabrication and Characterization of Tunneling Field Effect Transistors (TFETs). ScholarBank@NUS Repository.
Abstract: CMOS device scaling faced several fundamental limits as transistor gate length is reduced towards sub-10 nm regime. The conventional Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)?s subthreshold swing has a limit of 60 mV/decade. This thermal limit has slowed down supply voltage scaling. As a result, power density in modern integrated circuits (ICs) has been increased a lot. New device concepts which can overcome the thermal limit on subthreshold swing have attracted a lot of research interest. Tunneling field effect transistor (TFET or Tunneling FET) is one of the device concepts which can potentially break the 60 mV/decade thermal limit, achieving very abrupt subthreshold swing. In this study, both experimental and simulation studies of the tunneling FET were carried out. Important process parameters for fabrication were studied. In order to improve tunneling FET device performance, thin Equivalent Oxide thickness (EOT) with low gate leakage current and abrupt doping profile with degenerated doping concentration should be achieved. High-? metal gate SiGe tunneling FET were fabricated and measured. The potential application of dopant segregation technique in fabrication of tunneling FET was also discussed. Tunneling FET device with dopant segregated source was fabricated and characterized. A non-local band to band tunneling algorithm was developed. This algorithm was shown to be useful in tunneling FET simulation. Tunneling FET variability study was carried out based on this algorithm. Tunneling FET performance was found to have little dependence on doping concentration variation. However, it was found to be very sensitive to EOT variation and tunneling junction position variation. In order to achieve consistent TFET device performance, very stringent process control is required. In summary, the TFET device is an attractive device candidate to succeed CMOS technology. However, experimental realization of tunneling FET is very challenging, and is due to the requirement of tight fabrication requirement and stringent process control.
URI: http://scholarbank.nus.edu.sg/handle/10635/22096
Appears in Collections:Master's Theses (Open)

Show full item record
Files in This Item:
File Description SizeFormatAccess SettingsVersion 
YangLT.pdf3.49 MBAdobe PDF

OPEN

NoneView/Download

Page view(s)

467
checked on Dec 11, 2017

Download(s)

498
checked on Dec 11, 2017

Google ScholarTM

Check


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.