Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/17553
Title: Advanced gate stack for CMOS nanotechnology
Authors: LIM EU-JIN ANDY
Keywords: Metal gate, Gate Stack, Work Function, CMOS
Issue Date: 16-Dec-2008
Citation: LIM EU-JIN ANDY (2008-12-16). Advanced gate stack for CMOS nanotechnology. ScholarBank@NUS Repository.
Abstract: Metal gate/high-k dielectric gate stacks are required for enhanced device performance in sub-45 nm CMOS technology nodes. Full silicidation of a polysilicon gate electrode with nickel is an attractive metal gate option and novel methods were explored to modulate the mid-gap work function (WF) of NiSi gate. Nickel-alloying with either terbium, or aluminum achieved a gate WF lowering of about ~0.2 b
URI: http://scholarbank.nus.edu.sg/handle/10635/17553
Appears in Collections:Ph.D Theses (Open)

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