Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/17112
Title: Simulation of superjunction MOSFET devices
Authors: ZHONG HANMEI
Keywords: Superjunction devices, power devices, ideal silicon limit, interdiffusion, partial SOI superjunction LDMOS
Issue Date: 16-Aug-2005
Source: ZHONG HANMEI (2005-08-16). Simulation of superjunction MOSFET devices. ScholarBank@NUS Repository.
Abstract: ABSTRACTInterdiffussion problem is unavoidable in superjunction device fabrication process. The practical superjunction device performance under interdiffusion influence is studied by extensive simulation and described in the thesis.Partial SOI superjunction LDMOS structure is proposed in recent years in undergraduate projects. 3-D simulation by DAVINCI is done to study its performance. Simulation considers all the possible structure variations of the device such as p, n column width variation and gate structure variation. The performances under different structures are compared to select the best structure. Simulation results show that the performance of partial SOI device has broken the silicon limit. Finally, the detail process flow is proposed for the future fabrication.
URI: http://scholarbank.nus.edu.sg/handle/10635/17112
Appears in Collections:Master's Theses (Open)

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