Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/16061
Title: Advanced gate stacks for nano-scale CMOS technology
Authors: WANG XINPENG
Keywords: CMOS, High-k Dielectric, Metal Gate, Work Function Tuning, Integration, Reliability
Issue Date: 1-Aug-2008
Source: WANG XINPENG (2008-08-01). Advanced gate stacks for nano-scale CMOS technology. ScholarBank@NUS Repository.
Abstract: The scope of this thesis emphasizes on studies of advanced gate stacks for future nanometer-scale CMOS device application.Firstly, a novel dielectric material HfLaO was investigated. The incorporation of La into HfO2 can not only improve the crystallization temperature and k value of the dielectric film, but also tune the EWF of some specific metal gates to the conduction or valence band edge of Si by optimizing the La composition in HfLaO. Secondly, two gate-first integration schemes for dual metal gate CMOS technology with band edge EWF were proposed. Lastly, BTI degradation under both static and dynamic stresses for n- and p-MOSFETs with HfO2 gate dielectric was comprehensively investigated. The evaluation of reliability for the gate stack involving HfLaO was also performed as compared with the case of HfO2.
URI: http://scholarbank.nus.edu.sg/handle/10635/16061
Appears in Collections:Ph.D Theses (Open)

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