Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/15912
Title: RIM: Reconfigurable Instruction Memory Hierarchy for Embedded Systems
Authors: GE ZHIGUO
Keywords: Memory hierarchy, low power, embedded systems, reconfigurable memory, compiler optimizations
Issue Date: 8-Jun-2009
Source: GE ZHIGUO (2009-06-08). RIM: Reconfigurable Instruction Memory Hierarchy for Embedded Systems. ScholarBank@NUS Repository.
Abstract: Embedded systems have been becoming increasingly popular during the past decades. Such systems are constrained by hardware resources and energy consumption, and instruction memory hierarchy is the bottleneck. In this thesis, we propose and design reconfigurable instruction memory hierarchies to achieve performance and energy improvement. Our work includes the following contributions: 1. We propose a scheme to statically configure instruction memory hierarchy (SRIM) for a given application to maximize the performance and minimize energy consumption. 2. To remedy the drawbacks of SRIM, we propose a dynamic reconfigurable instruction memory to obtain more flexibility. 3. Instead of shutting of down under-utilized storage resources, we propose a DVS-based pipelined reconfigurable instruction memory hierarchy (PRIM) to take advantage of them for achieving more energy savings. Our proposed schemes can tune hardware parameters for specific applications and they are more flexible. As a result of this flexibility, they achieve great performance and energy improvement.
URI: http://scholarbank.nus.edu.sg/handle/10635/15912
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