NEGATIVE CAPACITANCE FERROELECTRIC MOSFET FOR LOW POWER CIRCUITS: POTENTIAL AND LIMITATIONS

Abstract

Negative capacitance (NC) ferroelectric MOSFET (FeFET) is a potential low power transistor beyond conventional MOSFET. Device- and circuit-level evaluations are presented to discuss its potential and limitations. NC in ferroelectric brings a beneficial effect of internal voltage amplification to FeFET, thus reducing its supply voltage and threshold voltage. Subthreshold swing can drop to below the conventional MOSFET limit of 60 mV/dec. The dynamic evaluation indicates that damping constant of ferroelectric determines the maximum frequency of FeFET for low power use. If ferroelectric responds as fast as MOSFET, the power reduction of FeFET is the same as supply voltage reduction, as compared with MOSFET. The optimal device structures should have an ultrathin channel and minimized gate-to-source/drain parasitic capacitances. Damping constant of BiFeO3 is measured to be around 100 Ω∙m, which may result from the domain-mediated switching process. Nanoscale ferroelectric should be further explored in order to achieve smaller damping constant.