Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/13571
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dc.titleReliability and characterization for deep sub-micron CMOS devices
dc.contributor.authorCHEN GANG
dc.date.accessioned2010-04-08T10:34:20Z
dc.date.available2010-04-08T10:34:20Z
dc.date.issued2003-12-09
dc.identifier.citationCHEN GANG (2003-12-09). Reliability and characterization for deep sub-micron CMOS devices. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/13571
dc.description.abstractThe DCIV technique was improved and its application extended to devices with direct tunneling oxide (Chapter 2), and the TTT method was developed to monitor source/drain region defect buildup (Chapter 3). the DCIV technique further showed its unique advantage to distinguish interface traps over the channel area or around the drain area. An interesting phenomenon regarding interface trap generation and recombination/migration was reported (Chapter 4). Hot carrier effect was studied for devices with direct tunneling gate oxide (Chapter 5). As interface trap creation dominates the device degradation, the DCIV method was used to investigate the degradation mechanism. A bottleneck for modern MOS devices is NBTI, which may become the scaling a??killera?? in terms of reliability. Fortunately, the finding of DNBTI, to a large extent, will alleviate the concern of this kind of degradation (Chapter 6).
dc.language.isoen
dc.subjectCMOS, reliability, characterization, interface state, hot carrier, NBTI
dc.typeThesis
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.contributor.supervisorLI MING-FU
dc.description.degreePh.D
dc.description.degreeconferredDOCTOR OF PHILOSOPHY
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Ph.D Theses (Open)

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chapter6.pdf102.4 kBAdobe PDF

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Appendix.pdf9.33 kBAdobe PDF

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