Please use this identifier to cite or link to this item:
https://doi.org/10.1016/j.mee.2010.01.010
DC Field | Value | |
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dc.title | Performance enhancement in Ge pMOSFETs with orientation fabricated with a Si-compatible process flow | |
dc.contributor.author | Dutta Gupta, S. | |
dc.contributor.author | Mitard, J. | |
dc.contributor.author | Eneman, G. | |
dc.contributor.author | De Jaeger, B. | |
dc.contributor.author | Meuris, M. | |
dc.contributor.author | Heyns, M.M. | |
dc.date.accessioned | 2016-10-19T08:44:38Z | |
dc.date.available | 2016-10-19T08:44:38Z | |
dc.date.issued | 2010-11 | |
dc.identifier.citation | Dutta Gupta, S., Mitard, J., Eneman, G., De Jaeger, B., Meuris, M., Heyns, M.M. (2010-11). Performance enhancement in Ge pMOSFETs with orientation fabricated with a Si-compatible process flow. Microelectronic Engineering 87 (11) : 2115-2118. ScholarBank@NUS Repository. https://doi.org/10.1016/j.mee.2010.01.010 | |
dc.identifier.issn | 01679317 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/128740 | |
dc.description.abstract | The electrical characterization of Ge pMOSFETs having and orientations with gate lengths of 3 μm have been demonstrated with a Si-compatible process flow. Employment of orientation in Ge pMOSFETs without incorporation of strain provided ∼10% enhancement in effective hole mobility and drive current when compared to oriented regular transistors. In this fabrication technology, the effective hole mobility improves from 190 cm2/V s for devices to 210 cm2/V s for the oriented Ge devices at room temperature, which is ∼2 times the hole mobility of Si pFET devices. This study also presents first time investigation of post metallization anneal (PMA) at 350 °C in H2 ambient for Ge pMOSFETs. The overall performance of the devices has been enhanced by 15% after performing PMA. It is likely attributed to a strong decrease of Dit, improving the transistor performance. These results indicate that the Ge pMOSFETs could be a viable candidate for future low voltage high speed CMOS applications. © 2010 Elsevier Ltd. All rights reserved. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1016/j.mee.2010.01.010 | |
dc.source | Scopus | |
dc.subject | Channel-orientation | |
dc.subject | Enhanced mobility | |
dc.subject | Germanium (Ge) | |
dc.subject | pFET devices | |
dc.type | Article | |
dc.contributor.department | SOLAR ENERGY RESEARCH INST OF S'PORE | |
dc.description.doi | 10.1016/j.mee.2010.01.010 | |
dc.description.sourcetitle | Microelectronic Engineering | |
dc.description.volume | 87 | |
dc.description.issue | 11 | |
dc.description.page | 2115-2118 | |
dc.description.coden | MIENE | |
dc.identifier.isiut | 000281420900018 | |
Appears in Collections: | Staff Publications |
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